The formation of various integrated circuit (IC) structures on a wafer often relies on lithographic processes, sometimes referred to as photolithography, or simply lithography. As is well known, lithographic processes can be used to transfer a pattern of a photomask (also referred to herein as a mask or a reticle) to a wafer.
For instance, lithography can be used to form a pattern in a photoresist layer that is disposed over a layer to be processed. Example underlying layers to be processed include a semiconductor layer, a metal or metal containing layer, a dielectric layer, a hard mask layer, and so forth. In the lithography process, a mask is provided that has a pattern corresponding to the desired pattern for the photoresist. Light energy is passed through a mask to image the desired pattern onto the photoresist layer. As a result, the pattern of the mask is transferred to the photoresist layer. After the photoresist is sufficiently exposed to the light energy and after a development cycle, the photoresist material can become selectively soluble such that portions of the photoresist can be removed to selectively expose the underlying layer to be processed. Portions of the photoresist layer that are not removed serve to protect the underlying layer during further processing of the wafer. Such further processing of the wafer can include, for example, etching exposed portions of the underlying layer, implanting ions into the wafer, and so forth. Thereafter, the remaining portions of the photoresist layer can be removed.
There is a pervasive trend in the art of IC fabrication to increase the density with which various structures are arranged. As a result, there is an ever decreasing amount of process margin in the techniques used to make the ICs. As an example, optical proximity correction (OPC) may be used to correct mask design data to compensate for a variety of phenomena that may occur during imaging and processing of the photoresist, among other process related variables. OPC can generally be used to compensate for optical proximity effects such as line end pullback, corner rounding, line width variations and so forth. Using the problem of line end pullback as an example, some common OPC techniques may add a “hammer-head” or serif(s) to a corresponding line to reduce the amount of line end pullback experienced during imaging of the photoresist. However, if actual process conditions during the imaging and development of the photoresist differ slightly from the process conditions assumed during the execution of the OPC routine, the end of the line may actually print closer to another feature than is desired. If the line and other feature are spaced too closely to one another, performance of the resulting integrated circuit may be compromised.
By the time a mask for patterning a particular layer of an IC is fabricated, an enormous amount of resources have been expended. Redesigning the mask may be impractical and/or can considerably delay fabrication of the IC. Accordingly, there exists a need in the art for techniques to correct a previously fabricated lithographic mask to achieve a desired process margin.